#include<command.h>

#define CONFIG_480p

#ifndef CONFIG_1080p
#define CONFIG_480p
#endif

#define HDMI_REG_BASE 0x46C00000
#define HDMI_REG_SIZE (4*1024)

#define hdmi_read32(off)            *(int*)(HDMI_REG_BASE+(off))
#define hdmi_write32(off, value)    *( int*)(HDMI_REG_BASE+(off)) = (value)

#define vps_read32(off)            *(volatile int*)(VPS_REG_BASE+(off))
#define vps_write32(off, value)    *(volatile int*)(VPS_REG_BASE+(off)) = (value)

#define VPS_REG_BASE		0x48100000
#define VPS_REG_SIZE		(128*1024)

#define vps_read32(off)            *(volatile int*)(VPS_REG_BASE+(off))
#define vps_write32(off, value)    *(volatile int*)(VPS_REG_BASE+(off)) = (value)

#define VPS_CLKC_ENABLE                 0x0100
#define VPS_CLKC_VENC_CLK_SELECT        0x0114
#define VPS_CLKC_VENC_ENABLE            0x0118
#define VPS_COMP_STATUS                 0x5200
#define VPS_COMP_BGCOLOR                0x5214
#define VPS_CLKC_RESET                  0x0104

#define __raw_writel(v, a)      (*(volatile unsigned int *)(a) = (v))
#define _raw_read32(off) *(volatile int *)(off) 

#define PRCM_REG_BASE 0x48180000
#define PRCM_REG_SIZE (12*1024)

#define prcm_read32(off)            *(volatile int*)(PRCM_REG_BASE+(off))
#define prcm_write32(off, value)    (*(volatile int*)(PRCM_REG_BASE+(off)) =(value))

#define CM_HDVPSS_CLKSTCTRL         0x0800
#define CM_HDVPSS_HDVPSS_CLK_CTRL   0x0820
#define CM_HDVPSS_HDMI_CLKCTRL      0x0824

#define PM_HDVPSS_PWRSTCTRL         0x0E00
#define PM_HDVPSS_PWRSTST           0x0E04
#define RM_HDVPSS_RSTCTRL           0x0E10
#define RM_HDVPSS_RSTST             0x0E14

#define PLL_REG_BASE 0x481C5000
#define PLL_REG_SIZE (4*1024)

#define pll_read32(off)            *(volatile int*)(PLL_REG_BASE+(off))
#define pll_write32(off, value)    (*(volatile int*)(PLL_REG_BASE+(off))= (unsigned int)(value))

#define CLKCTRL        0x04
#define TENABLE        0x08
#define TENABLEDIV     0x0C
#define M2NDIV         0x10
#define MN2DIV         0x14
#define STATUS         0x24
#define OSC_FREQ       20

#define PLL_CONTROL_REVISION      0x0000
#define PLL_CONTROL_SYSCONFIG     0x0010

#define PLL_HDVPSS_BASE           PLL_HDVPSS_PWRCTRL
#define PLL_HDVPSS_PWRCTRL        0x0170
#define PLL_HDVPSS_CLKCTRL        0x0174
#define PLL_HDVPSS_TENABLE        0x0178
#define PLL_HDVPSS_TENABLEDIV     0x017C
#define PLL_HDVPSS_M2NDIV         0x0180
#define PLL_HDVPSS_MN2DIV         0x0184
#define PLL_HDVPSS_FRACDIV        0x0188
#define PLL_HDVPSS_BWCTRL         0x018C
#define PLL_HDVPSS_FRACCTRL       0x0190
#define PLL_HDVPSS_STATUS         0x0194

#define PLL_VIDEO0_BASE           PLL_VIDEO0_PWRCTRL
#define PLL_VIDEO0_PWRCTRL        0x01A0
#define PLL_VIDEO0_CLKCTRL        0x01A4
#define PLL_VIDEO0_TENABLE        0x01A8
#define PLL_VIDEO0_TENABLEDIV     0x01AC
#define PLL_VIDEO0_M2NDIV         0x01B0
#define PLL_VIDEO0_MN2DIV         0x01B4
#define PLL_VIDEO0_FRACDIV        0x01B8
#define PLL_VIDEO0_BWCTRL         0x01BC
#define PLL_VIDEO0_FRACCTRL       0x01C0
#define PLL_VIDEO0_STATUS         0x01C4

#define PLL_VIDEO1_BASE           PLL_VIDEO1_PWRCTRL
#define PLL_VIDEO1_PWRCTRL        0x01D0
#define PLL_VIDEO1_CLKCTRL        0x01D4
#define PLL_VIDEO1_TENABLE        0x01D8
#define PLL_VIDEO1_TENABLEDIV     0x01DC
#define PLL_VIDEO1_M2NDIV         0x01E0
#define PLL_VIDEO1_MN2DIV         0x01E4
#define PLL_VIDEO1_FRACDIV        0x01E8
#define PLL_VIDEO1_BWCTRL         0x01EC
#define PLL_VIDEO1_FRACCTRL       0x01F0
#define PLL_VIDEO1_STATUS         0x01F4

#define PLL_VIDEO2_BASE           PLL_VIDEO2_PWRCTRL
#define PLL_VIDEO2_PWRCTRL        0x0200
#define PLL_VIDEO2_CLKCTRL        0x0204
#define PLL_VIDEO2_TENABLE        0x0208
#define PLL_VIDEO2_TENABLEDIV     0x020C
#define PLL_VIDEO2_M2NDIV         0x0210
#define PLL_VIDEO2_MN2DIV         0x0214
#define PLL_VIDEO2_FRACDIV        0x0218
#define PLL_VIDEO2_BWCTRL         0x021C
#define PLL_VIDEO2_FRACCTRL       0x0220
#define PLL_VIDEO2_STATUS         0x0224
#define PLL_VIDEO2_PINMUX         0x02C8

#define PLL_OSC_SRC_CTRL          0x02C0

#define bmp_read64(off)		*(long long*)(off)
#define bmp_read16(off)		*(short int*)(off)


#define DATA_TYPE 0x6

#ifdef CONFIG_480p
#define WIDTH  720
#define HEIGHT 480
#else
#define WIDTH  1920
#define HEIGHT 1080
#endif

typedef int uint32_t;
typedef short uint16_t;
typedef int int32_t;
typedef struct
 {
         uint32_t n;
         uint32_t m;
         uint32_t m2; 
         uint32_t clk_ctrl;
 } pll_config_t;

static int ti814x_pll_get_dividers(uint32_t req_out_clk, int hdmi, pll_config_t* config);
static void ti814x_pll_configure(uint32_t baseAddr, uint32_t N, uint32_t M, uint32_t M2, uint32_t clkCtrlValue);
static int ti814x_pll_config_hdvpss();
static int ti814x_prcm_enable_vps_power_and_clock( void );
static void ti814x_vps_configure_venc(uint32_t cfg_reg_base, int hdisp, int hsyncstart, int hsyncend, int htotal, int vdisp, int vsyncstart, int vsyncend, int vtotal, int enable_invert, int hs_invert, int vs_invert);
int ti814x_prcm_init();
int ti814x_pll_init();
int ti814x_vps_init();
int ti814x_set_mode(int ,int , int);

